mmUVD_PGFSM_STATUS_BASE_IDX   31 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_PGFSM_STATUS_BASE_IDX                                                                    1
mmUVD_PGFSM_STATUS_BASE_IDX  383 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_PGFSM_STATUS_BASE_IDX                                                                    1
mmUVD_PGFSM_STATUS_BASE_IDX  386 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_PGFSM_STATUS_BASE_IDX                                                                    1