mmUVD_PGFSM_STATUS   30 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_PGFSM_STATUS                                                                             0x00c1
mmUVD_PGFSM_STATUS  382 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_PGFSM_STATUS                                                                             0x0001
mmUVD_PGFSM_STATUS  385 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_PGFSM_STATUS                                                                             0x0001