mmUVD_MPC_SET_ALU   54 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_MPC_SET_ALU 0x3D7E
mmUVD_MPC_SET_ALU   59 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_MPC_SET_ALU                                                       0x3d7e
mmUVD_MPC_SET_ALU   65 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_MPC_SET_ALU                                                       0x3d7e
mmUVD_MPC_SET_ALU   81 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_MPC_SET_ALU                                                       0x3d7e
mmUVD_MPC_SET_ALU  174 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_MPC_SET_ALU                                                                              0x057e
mmUVD_MPC_SET_ALU  356 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_MPC_SET_ALU                                                                              0x057e
mmUVD_MPC_SET_ALU  606 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_MPC_SET_ALU                                                                              0x023e
mmUVD_MPC_SET_ALU  759 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_MPC_SET_ALU                                                                              0x02d3