mmUVD_MPC_CNTL     53 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_MPC_CNTL 0x3D77
mmUVD_MPC_CNTL     53 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_MPC_CNTL                                                          0x3d77
mmUVD_MPC_CNTL     59 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_MPC_CNTL                                                          0x3d77
mmUVD_MPC_CNTL     75 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_MPC_CNTL                                                          0x3d77
mmUVD_MPC_CNTL    344 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_MPC_CNTL                                                                                 0x0577
mmUVD_MPC_CNTL    592 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_MPC_CNTL                                                                                 0x0237
mmUVD_MPC_CNTL    745 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_MPC_CNTL                                                                                 0x02cc