mmUVD_JRBC_STATUS_BASE_IDX  287 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_JRBC_STATUS_BASE_IDX                                                                     1
mmUVD_JRBC_STATUS_BASE_IDX  137 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_JRBC_STATUS_BASE_IDX                                                                     0
mmUVD_JRBC_STATUS_BASE_IDX  140 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_JRBC_STATUS_BASE_IDX                                                                     0