mmUVD_JRBC_RB_RPTR  104 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_JRBC_RB_RPTR                                                                             0x0457
mmUVD_JRBC_RB_RPTR  228 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_JRBC_RB_RPTR                                                                             0x0457
mmUVD_JRBC_RB_RPTR  138 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_JRBC_RB_RPTR                                                                             0x010a
mmUVD_JRBC_RB_RPTR  141 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_JRBC_RB_RPTR                                                                             0x010a