mmUVD_JRBC_ENC_RB_CNTL  166 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_JRBC_ENC_RB_CNTL                                                                         0x0121
mmUVD_JRBC_ENC_RB_CNTL  169 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_JRBC_ENC_RB_CNTL                                                                         0x0121