mmUVD_GPCOM_VCPU_DATA1 44 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_GPCOM_VCPU_DATA1 0x3BC5 mmUVD_GPCOM_VCPU_DATA1 32 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_GPCOM_VCPU_DATA1 0x3bc5 mmUVD_GPCOM_VCPU_DATA1 32 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_GPCOM_VCPU_DATA1 0x3bc5 mmUVD_GPCOM_VCPU_DATA1 32 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_GPCOM_VCPU_DATA1 0x3bc5 mmUVD_GPCOM_VCPU_DATA1 58 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_GPCOM_VCPU_DATA1 0x03c5 mmUVD_GPCOM_VCPU_DATA1 142 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_GPCOM_VCPU_DATA1 0x03c5 mmUVD_GPCOM_VCPU_DATA1 814 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_GPCOM_VCPU_DATA1 0x0585 mmUVD_GPCOM_VCPU_DATA1 503 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_GPCOM_VCPU_DATA1 0x0091