mmUVD_GPCOM_VCPU_DATA0_BASE_IDX   57 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_GPCOM_VCPU_DATA0_BASE_IDX                                                                1
mmUVD_GPCOM_VCPU_DATA0_BASE_IDX  141 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_GPCOM_VCPU_DATA0_BASE_IDX                                                                1
mmUVD_GPCOM_VCPU_DATA0_BASE_IDX  813 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_GPCOM_VCPU_DATA0_BASE_IDX                                                                1
mmUVD_GPCOM_VCPU_DATA0_BASE_IDX  502 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_GPCOM_VCPU_DATA0_BASE_IDX                                                                1