mmUVD_GPCOM_VCPU_DATA0 43 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_GPCOM_VCPU_DATA0 0x3BC4 mmUVD_GPCOM_VCPU_DATA0 31 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_GPCOM_VCPU_DATA0 0x3bc4 mmUVD_GPCOM_VCPU_DATA0 31 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_GPCOM_VCPU_DATA0 0x3bc4 mmUVD_GPCOM_VCPU_DATA0 31 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_GPCOM_VCPU_DATA0 0x3bc4 mmUVD_GPCOM_VCPU_DATA0 56 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_GPCOM_VCPU_DATA0 0x03c4 mmUVD_GPCOM_VCPU_DATA0 140 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_GPCOM_VCPU_DATA0 0x03c4 mmUVD_GPCOM_VCPU_DATA0 812 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_GPCOM_VCPU_DATA0 0x0584 mmUVD_GPCOM_VCPU_DATA0 501 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_GPCOM_VCPU_DATA0 0x0090