mmUVD_DPG_LMI_VCPU_CACHE_VMID_BASE_IDX  439 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_DPG_LMI_VCPU_CACHE_VMID_BASE_IDX                                                         1
mmUVD_DPG_LMI_VCPU_CACHE_VMID_BASE_IDX  442 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_DPG_LMI_VCPU_CACHE_VMID_BASE_IDX                                                         1