mmUVD_DPG_LMA_MASK   40 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_DPG_LMA_MASK                                                                             0x00d3
mmUVD_DPG_LMA_MASK  398 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_DPG_LMA_MASK                                                                             0x0013
mmUVD_DPG_LMA_MASK  401 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_DPG_LMA_MASK                                                                             0x0013