mmUVD_DPG_LMA_CTL_BASE_IDX   37 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_DPG_LMA_CTL_BASE_IDX                                                                     1
mmUVD_DPG_LMA_CTL_BASE_IDX  395 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_DPG_LMA_CTL_BASE_IDX                                                                     1
mmUVD_DPG_LMA_CTL_BASE_IDX  398 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_DPG_LMA_CTL_BASE_IDX                                                                     1