mmUVD_DPG_LMA_CTL   36 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_DPG_LMA_CTL                                                                              0x00d1
mmUVD_DPG_LMA_CTL  394 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_DPG_LMA_CTL                                                                              0x0011
mmUVD_DPG_LMA_CTL  397 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_DPG_LMA_CTL                                                                              0x0011