mmUVD_CGC_STATUS_BASE_IDX  307 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_CGC_STATUS_BASE_IDX                                                                      1
mmUVD_CGC_STATUS_BASE_IDX  507 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_CGC_STATUS_BASE_IDX                                                                      1
mmUVD_CGC_STATUS_BASE_IDX  488 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_CGC_STATUS_BASE_IDX                                                                      1