mmUVD_CGC_CTRL_BASE_IDX  147 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_CGC_CTRL_BASE_IDX                                                                        1
mmUVD_CGC_CTRL_BASE_IDX  309 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_CGC_CTRL_BASE_IDX                                                                        1
mmUVD_CGC_CTRL_BASE_IDX  509 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_CGC_CTRL_BASE_IDX                                                                        1
mmUVD_CGC_CTRL_BASE_IDX  490 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_CGC_CTRL_BASE_IDX                                                                        1