mmUVD_CGC_CTRL 34 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_CGC_CTRL 0x3D2C mmUVD_CGC_CTRL 44 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_CGC_CTRL 0x3d2c mmUVD_CGC_CTRL 50 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_CGC_CTRL 0x3d2c mmUVD_CGC_CTRL 66 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_CGC_CTRL 0x3d2c mmUVD_CGC_CTRL 146 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_CGC_CTRL 0x052c mmUVD_CGC_CTRL 308 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_CGC_CTRL 0x052c mmUVD_CGC_CTRL 508 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_CGC_CTRL 0x01ec mmUVD_CGC_CTRL 489 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_CGC_CTRL 0x008a