mmUTCL2_CGTT_CLK_CTRL_BASE_IDX 6683 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmUTCL2_CGTT_CLK_CTRL_BASE_IDX                                                                 1
mmUTCL2_CGTT_CLK_CTRL_BASE_IDX 6929 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmUTCL2_CGTT_CLK_CTRL_BASE_IDX                                                                 1
mmUTCL2_CGTT_CLK_CTRL_BASE_IDX 6953 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmUTCL2_CGTT_CLK_CTRL_BASE_IDX                                                                 1
mmUTCL2_CGTT_CLK_CTRL_BASE_IDX 1885 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmUTCL2_CGTT_CLK_CTRL_BASE_IDX                                                                 0
mmUTCL2_CGTT_CLK_CTRL_BASE_IDX 1917 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmUTCL2_CGTT_CLK_CTRL_BASE_IDX                                                                 0
mmUTCL2_CGTT_CLK_CTRL_BASE_IDX 1901 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmUTCL2_CGTT_CLK_CTRL_BASE_IDX                                                                 0