mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX 1829 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2
mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX 10374 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2
mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX 12751 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2
mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX 11329 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmUNIPHYD_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2