mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX 1825 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2
mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX 10370 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2
mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX 12747 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2
mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX 11325 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmUNIPHYC_CHANNEL_XBAR_CNTL_BASE_IDX                                                           2