mmTD_DSM_CNTL_BASE_IDX 2735 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmTD_DSM_CNTL_BASE_IDX                                                                         0
mmTD_DSM_CNTL_BASE_IDX  835 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmTD_DSM_CNTL_BASE_IDX                                                                         0
mmTD_DSM_CNTL_BASE_IDX  807 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmTD_DSM_CNTL_BASE_IDX                                                                         0
mmTD_DSM_CNTL_BASE_IDX  783 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmTD_DSM_CNTL_BASE_IDX                                                                         0