mmTCP_WATCH3_CNTL_BASE_IDX 5501 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmTCP_WATCH3_CNTL_BASE_IDX                                                                     0
mmTCP_WATCH3_CNTL_BASE_IDX 2993 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmTCP_WATCH3_CNTL_BASE_IDX                                                                     0
mmTCP_WATCH3_CNTL_BASE_IDX 3245 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmTCP_WATCH3_CNTL_BASE_IDX                                                                     0
mmTCP_WATCH3_CNTL_BASE_IDX 3197 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmTCP_WATCH3_CNTL_BASE_IDX                                                                     0