mmTCP_WATCH1_CNTL 5488 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmTCP_WATCH1_CNTL 0x2045 mmTCP_WATCH1_CNTL 2980 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmTCP_WATCH1_CNTL 0x12a5 mmTCP_WATCH1_CNTL 3232 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmTCP_WATCH1_CNTL 0x12a5 mmTCP_WATCH1_CNTL 3184 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmTCP_WATCH1_CNTL 0x12a5 mmTCP_WATCH1_CNTL 2143 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmTCP_WATCH1_CNTL 0x32a5 mmTCP_WATCH1_CNTL 2164 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmTCP_WATCH1_CNTL 0x32a5 mmTCP_WATCH1_CNTL 2356 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmTCP_WATCH1_CNTL 0x32a5 mmTCP_WATCH1_CNTL 2335 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmTCP_WATCH1_CNTL 0x32a5