mmTCP_UTCL1_CNTL2_BASE_IDX 3005 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmTCP_UTCL1_CNTL2_BASE_IDX                                                                     0
mmTCP_UTCL1_CNTL2_BASE_IDX 3257 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmTCP_UTCL1_CNTL2_BASE_IDX                                                                     0
mmTCP_UTCL1_CNTL2_BASE_IDX 3207 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmTCP_UTCL1_CNTL2_BASE_IDX                                                                     0