mmTCC_DSM_CNTL2  1749 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmTCC_DSM_CNTL2                                                                                0x0b88
mmTCC_DSM_CNTL2  2048 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmTCC_DSM_CNTL2                                                                                0x0b88
mmTCC_DSM_CNTL2  1984 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmTCC_DSM_CNTL2                                                                                0x0b88