mmTA_CNTL_BASE_IDX 2743 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmTA_CNTL_BASE_IDX                                                                             0
mmTA_CNTL_BASE_IDX  841 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmTA_CNTL_BASE_IDX                                                                             0
mmTA_CNTL_BASE_IDX  813 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmTA_CNTL_BASE_IDX                                                                             0
mmTA_CNTL_BASE_IDX  789 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmTA_CNTL_BASE_IDX                                                                             0