mmSQ_UTCL1_CNTL2  420 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQ_UTCL1_CNTL2                                                                               0x0318
mmSQ_UTCL1_CNTL2  414 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQ_UTCL1_CNTL2                                                                               0x0318
mmSQ_UTCL1_CNTL2  410 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQ_UTCL1_CNTL2                                                                               0x0318