mmSQ_TIME_HI_BASE_IDX 2533 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSQ_TIME_HI_BASE_IDX                                                                          0
mmSQ_TIME_HI_BASE_IDX  461 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQ_TIME_HI_BASE_IDX                                                                          0
mmSQ_TIME_HI_BASE_IDX  455 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQ_TIME_HI_BASE_IDX                                                                          0
mmSQ_TIME_HI_BASE_IDX  445 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQ_TIME_HI_BASE_IDX                                                                          0