mmSQ_SMEM_1_BASE_IDX  501 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQ_SMEM_1_BASE_IDX                                                                           0
mmSQ_SMEM_1_BASE_IDX  495 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQ_SMEM_1_BASE_IDX                                                                           0
mmSQ_SMEM_1_BASE_IDX  485 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQ_SMEM_1_BASE_IDX                                                                           0