mmSQ_SMEM_0_BASE_IDX  499 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQ_SMEM_0_BASE_IDX                                                                           0
mmSQ_SMEM_0_BASE_IDX  493 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQ_SMEM_0_BASE_IDX                                                                           0
mmSQ_SMEM_0_BASE_IDX  483 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQ_SMEM_0_BASE_IDX                                                                           0