mmSQ_LB_CTR_SEL_BASE_IDX  547 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQ_LB_CTR_SEL_BASE_IDX                                                                       0
mmSQ_LB_CTR_SEL_BASE_IDX  541 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQ_LB_CTR_SEL_BASE_IDX                                                                       0
mmSQ_LB_CTR_SEL_BASE_IDX  531 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQ_LB_CTR_SEL_BASE_IDX                                                                       0