mmSQ_GLBL_1_BASE_IDX  479 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQ_GLBL_1_BASE_IDX                                                                           0
mmSQ_GLBL_1_BASE_IDX  473 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQ_GLBL_1_BASE_IDX                                                                           0
mmSQ_GLBL_1_BASE_IDX  463 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQ_GLBL_1_BASE_IDX                                                                           0