mmSQ_EDC_FUE_CNTL 2552 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSQ_EDC_FUE_CNTL                                                                              0x1147
mmSQ_EDC_FUE_CNTL  566 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQ_EDC_FUE_CNTL                                                                              0x03a7
mmSQ_EDC_FUE_CNTL  560 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQ_EDC_FUE_CNTL                                                                              0x03a7