mmSQC_ICACHE_UTCL1_STATUS_BASE_IDX  657 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQC_ICACHE_UTCL1_STATUS_BASE_IDX                                                             0
mmSQC_ICACHE_UTCL1_STATUS_BASE_IDX  651 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQC_ICACHE_UTCL1_STATUS_BASE_IDX                                                             0
mmSQC_ICACHE_UTCL1_STATUS_BASE_IDX  629 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQC_ICACHE_UTCL1_STATUS_BASE_IDX                                                             0