mmSQC_ICACHE_UTCL1_CNTL1  648 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQC_ICACHE_UTCL1_CNTL1                                                                       0x03d3
mmSQC_ICACHE_UTCL1_CNTL1  642 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQC_ICACHE_UTCL1_CNTL1                                                                       0x03d3
mmSQC_ICACHE_UTCL1_CNTL1  620 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQC_ICACHE_UTCL1_CNTL1                                                                       0x03d3