mmSQC_DSM_CNTL2_BASE_IDX  439 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQC_DSM_CNTL2_BASE_IDX                                                                       0
mmSQC_DSM_CNTL2_BASE_IDX  433 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQC_DSM_CNTL2_BASE_IDX                                                                       0
mmSQC_DSM_CNTL2_BASE_IDX  429 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQC_DSM_CNTL2_BASE_IDX                                                                       0