mmSQC_DCACHE_UTCL1_CNTL1  652 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSQC_DCACHE_UTCL1_CNTL1                                                                       0x03d5
mmSQC_DCACHE_UTCL1_CNTL1  646 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSQC_DCACHE_UTCL1_CNTL1                                                                       0x03d5
mmSQC_DCACHE_UTCL1_CNTL1  624 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSQC_DCACHE_UTCL1_CNTL1                                                                       0x03d5