mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX 5181 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX                                                            0
mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX 2679 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX                                                            0
mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX 2945 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX                                                            0
mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX 2887 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX                                                            0