mmSPI_START_PHASE_BASE_IDX 2581 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_START_PHASE_BASE_IDX                                                                     0
mmSPI_START_PHASE_BASE_IDX  679 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_START_PHASE_BASE_IDX                                                                     0
mmSPI_START_PHASE_BASE_IDX  663 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_START_PHASE_BASE_IDX                                                                     0
mmSPI_START_PHASE_BASE_IDX  641 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_START_PHASE_BASE_IDX                                                                     0