mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX 5195 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX                                                           0
mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX 2709 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX                                                           0
mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX 2959 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX                                                           0
mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX 2915 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX                                                           0