mmSPI_PS_IN_CONTROL_BASE_IDX 6313 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_IN_CONTROL_BASE_IDX                                                                   1
mmSPI_PS_IN_CONTROL_BASE_IDX 3907 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_IN_CONTROL_BASE_IDX                                                                   1
mmSPI_PS_IN_CONTROL_BASE_IDX 4159 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_IN_CONTROL_BASE_IDX                                                                   1
mmSPI_PS_IN_CONTROL_BASE_IDX 4111 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_IN_CONTROL_BASE_IDX                                                                   1