mmSPI_PS_INPUT_CNTL_5 6250 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_5                                                                          0x0196
mmSPI_PS_INPUT_CNTL_5 3844 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_5                                                                          0x0196
mmSPI_PS_INPUT_CNTL_5 4096 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_5                                                                          0x0196
mmSPI_PS_INPUT_CNTL_5 4048 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_5                                                                          0x0196
mmSPI_PS_INPUT_CNTL_5 1247 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_5 0xA196
mmSPI_PS_INPUT_CNTL_5 1366 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_5                                                   0xa196
mmSPI_PS_INPUT_CNTL_5 1383 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_5                                                   0xa196
mmSPI_PS_INPUT_CNTL_5 1562 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_5                                                   0xa196
mmSPI_PS_INPUT_CNTL_5 1530 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_5                                                   0xa196