mmSPI_PS_INPUT_CNTL_4 6248 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_4                                                                          0x0195
mmSPI_PS_INPUT_CNTL_4 3842 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_4                                                                          0x0195
mmSPI_PS_INPUT_CNTL_4 4094 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_4                                                                          0x0195
mmSPI_PS_INPUT_CNTL_4 4046 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_4                                                                          0x0195
mmSPI_PS_INPUT_CNTL_4 1246 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_4 0xA195
mmSPI_PS_INPUT_CNTL_4 1365 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_4                                                   0xa195
mmSPI_PS_INPUT_CNTL_4 1382 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_4                                                   0xa195
mmSPI_PS_INPUT_CNTL_4 1561 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_4                                                   0xa195
mmSPI_PS_INPUT_CNTL_4 1529 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_4                                                   0xa195