mmSPI_PS_INPUT_CNTL_30 6300 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_30                                                                         0x01af
mmSPI_PS_INPUT_CNTL_30 3894 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_30                                                                         0x01af
mmSPI_PS_INPUT_CNTL_30 4146 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_30                                                                         0x01af
mmSPI_PS_INPUT_CNTL_30 4098 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_30                                                                         0x01af
mmSPI_PS_INPUT_CNTL_30 1243 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_30 0xA1AF
mmSPI_PS_INPUT_CNTL_30 1391 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_30                                                  0xa1af
mmSPI_PS_INPUT_CNTL_30 1408 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_30                                                  0xa1af
mmSPI_PS_INPUT_CNTL_30 1587 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_30                                                  0xa1af
mmSPI_PS_INPUT_CNTL_30 1555 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_30                                                  0xa1af