mmSPI_PS_INPUT_CNTL_25 6290 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_25                                                                         0x01aa
mmSPI_PS_INPUT_CNTL_25 3884 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_25                                                                         0x01aa
mmSPI_PS_INPUT_CNTL_25 4136 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_25                                                                         0x01aa
mmSPI_PS_INPUT_CNTL_25 4088 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_25                                                                         0x01aa
mmSPI_PS_INPUT_CNTL_25 1238 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_25 0xA1AA
mmSPI_PS_INPUT_CNTL_25 1386 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_25                                                  0xa1aa
mmSPI_PS_INPUT_CNTL_25 1403 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_25                                                  0xa1aa
mmSPI_PS_INPUT_CNTL_25 1582 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_25                                                  0xa1aa
mmSPI_PS_INPUT_CNTL_25 1550 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_25                                                  0xa1aa