mmSPI_PS_INPUT_CNTL_2 6244 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_2                                                                          0x0193
mmSPI_PS_INPUT_CNTL_2 3838 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_2                                                                          0x0193
mmSPI_PS_INPUT_CNTL_2 4090 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_2                                                                          0x0193
mmSPI_PS_INPUT_CNTL_2 4042 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_2                                                                          0x0193
mmSPI_PS_INPUT_CNTL_2 1233 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_2 0xA193
mmSPI_PS_INPUT_CNTL_2 1363 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_2                                                   0xa193
mmSPI_PS_INPUT_CNTL_2 1380 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_2                                                   0xa193
mmSPI_PS_INPUT_CNTL_2 1559 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_2                                                   0xa193
mmSPI_PS_INPUT_CNTL_2 1527 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_2                                                   0xa193