mmSPI_PS_INPUT_CNTL_18 6276 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_18                                                                         0x01a3
mmSPI_PS_INPUT_CNTL_18 3870 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_18                                                                         0x01a3
mmSPI_PS_INPUT_CNTL_18 4122 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_18                                                                         0x01a3
mmSPI_PS_INPUT_CNTL_18 4074 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_18                                                                         0x01a3
mmSPI_PS_INPUT_CNTL_18 1230 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_18 0xA1A3
mmSPI_PS_INPUT_CNTL_18 1379 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_18                                                  0xa1a3
mmSPI_PS_INPUT_CNTL_18 1396 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_18                                                  0xa1a3
mmSPI_PS_INPUT_CNTL_18 1575 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_18                                                  0xa1a3
mmSPI_PS_INPUT_CNTL_18 1543 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_18                                                  0xa1a3