mmSPI_PS_INPUT_CNTL_1 6242 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_1                                                                          0x0192
mmSPI_PS_INPUT_CNTL_1 3836 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_1                                                                          0x0192
mmSPI_PS_INPUT_CNTL_1 4088 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_1                                                                          0x0192
mmSPI_PS_INPUT_CNTL_1 4040 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_1                                                                          0x0192
mmSPI_PS_INPUT_CNTL_1 1222 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_1 0xA192
mmSPI_PS_INPUT_CNTL_1 1362 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_1                                                   0xa192
mmSPI_PS_INPUT_CNTL_1 1379 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_1                                                   0xa192
mmSPI_PS_INPUT_CNTL_1 1558 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_1                                                   0xa192
mmSPI_PS_INPUT_CNTL_1 1526 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_1                                                   0xa192