mmSPI_PS_INPUT_CNTL_0 6240 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_PS_INPUT_CNTL_0                                                                          0x0191
mmSPI_PS_INPUT_CNTL_0 3834 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PS_INPUT_CNTL_0                                                                          0x0191
mmSPI_PS_INPUT_CNTL_0 4086 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PS_INPUT_CNTL_0                                                                          0x0191
mmSPI_PS_INPUT_CNTL_0 4038 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PS_INPUT_CNTL_0                                                                          0x0191
mmSPI_PS_INPUT_CNTL_0 1220 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmSPI_PS_INPUT_CNTL_0 0xA191
mmSPI_PS_INPUT_CNTL_0 1361 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmSPI_PS_INPUT_CNTL_0                                                   0xa191
mmSPI_PS_INPUT_CNTL_0 1378 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmSPI_PS_INPUT_CNTL_0                                                   0xa191
mmSPI_PS_INPUT_CNTL_0 1557 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmSPI_PS_INPUT_CNTL_0                                                   0xa191
mmSPI_PS_INPUT_CNTL_0 1525 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmSPI_PS_INPUT_CNTL_0                                                   0xa191