mmSPI_PG_ENABLE_STATIC_CU_MASK_BASE_IDX  767 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_PG_ENABLE_STATIC_CU_MASK_BASE_IDX                                                        0
mmSPI_PG_ENABLE_STATIC_CU_MASK_BASE_IDX  745 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_PG_ENABLE_STATIC_CU_MASK_BASE_IDX                                                        0
mmSPI_PG_ENABLE_STATIC_CU_MASK_BASE_IDX  721 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_PG_ENABLE_STATIC_CU_MASK_BASE_IDX                                                        0